"Characterization of Through Silicon Vias using X ray Computed" 

Sidhaant Vasudeva, MSE PhD Candidate 

Advisor: Professor Nikhilesh Chawla

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ABSTRACT

Heterogeneous Integrated Packages (HIP) are the next big step in the Integrated Chip (IC) industry, due to their smaller package size, complemented with faster signal speeds and lower power consumption. Through Silicon Vias (TSVs) are an integral part of the 3D HIPs, enabling high density vertical interconnections, but fabrication and operational defects pose challenges in their reliability. Characterization is also a challenge as destructive techniques like Scanning Electron Microscopy (SEM) are time-consuming, waste material and only show a small cross-section. Faster characterization and quantification of TSVs is needed to accelerate manufacturing and adopt HIPs into the commercial market. X ray Computed Tomography (XCT) is a non-destructive technique which enables characterization of multiple TSVs at once, with no damage to the material and minimal sample preparation, making it a viable option for TSV characterization. However, due to long scan times and lack of quantification studies, it is still not integrated into the current chip fabrication industry. This study addresses the challenges in using XCT for TSV characterization, and the need for quantitative studies on TSV fabrication-parameter relationships, time-resolved thermal cycling studies on TSVs and advancement of faster, high resolution XCT techniques like laminography, to enable XCT as a tool to characterize TSVs efficiently and improve HIP manufacturing.